Sharon Graif

Current

• Object Leader at ST-Ericsson

Past

• Sr ASIC Enigneer at SwitchCore AB
• Electrical Engineer at Intel
• Sr ASIC Engineer at Xlight

• ASIC Engineer at Neomagic Israel

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Education

• Universitat Ben Gurion Ba-Negev

Connections

246 connections

Industry

Telecommunications

Sharon Graif’s Summary

With over 12 years of experience in leadership and engineering roles at technology organizations, I can offer high tech companies the ability to dramatically reduce time to market using the following skills:

- Team player - ability to lead and drive globally diverse teams and colleagues
- Innovative, creative - ability to contribute to products from various aspects, utilizing an unusual thinking "outside the box"
- Fast learner - ability to catch up and resolve complex issues very fast
- Ability to work in "multi-tasking" - handle many missions at the same time
- Excellent relations with customers - inside and outside the organization

• Working with LTE, DigRF v4 (MIPI) , Digital Processors,DSP, DMA Controller and Ethernet protocols 802.3, 802.11 and 802.16 (worked in company such Intel, Ericsson, Neomagic), TCP segmentation and other protocols of TCP/IP (SNAP, VLAN, IPV4 and IPV6 etc) also worked in Switch Company (work in company such Xlight, SwitchCore)
• Coding at System Verilog, VHDL.
• Architecture definition.
• Integration of the legacy IP blocks.
• Design Verification with specman and NC-Verilog.
• Synthesis and Timing Closure with Synopsys DC.
• ATPG and Scan insertion with Fastscan. This included designing the DFT blocks with @speed testing.
• SV on board chip verification.
.

Contact me : graif@hotmail.com

Sharon Graif’s Specialties:

DSP TCP/IP PCI-Express Synopsys DC SCAN ATPG Specman System-Verilog DMA IC MIPS CPU 802.3 802.11 DIGRF

Sharon Graif’s Experience

• Object Leader

  ST-Ericsson

  (Public Company; Telecommunications industry)

  August 2007 — Present (2 years 5 months)

  Object Leader of DigRF v4 on LTE protocol and Technical Leader of DSP (Digital Signal Processors) on WCDMA protocol.
  Design with VHDL, Synthesis and Timing Closure with Synopsys DC.

• Sr ASIC Enigneer

  SwitchCore AB

  (Public Company; 51-200 employees; Telecommunications industry)

  March 2007 — August 2007 (6 months)

• Electrical Engineer

  Intel

  (Public Company; 10,001 or more employees; INTC; Semiconductors industry)

  December 2001 — March 2007 (5 years 4 months)

  Worked as a Logic Design Engineer in Intel Israel, designing commutation chips. worked in WiFi group in MIMO project and also in the LAN group I took a big part in the design of the DMA block in a DUAL port LAN with PCI Express ports.
  My responsibilities include:
  • Working with digital Processors, DMA Controller and Ethernet protocols, such as TCP segmentation and all the protocols of TCP/IP (SNAP, VLAN, IPV4 and IPV6 etc).
  • Coding the DMA and some other blocks.
  • Architecture definition of the transmit pipe line.
  • Integration of the legacy IP blocks.
  • Design Verification with specman and NC-Verilog.
  • Synthesis and Timing Closure with Synopsys DC.
  • ATPG and Scan insertion with Fastscan. This included designing the DFT blocks with @speed testing.
  • SV on board chip verification.

• Sr ASIC Engineer

  Xlight

  (Privately Held; 51-200 employees; Computer Networking industry)

  January 2001 — December 2001 (1 year )

  Worked as Logic Design Engineer in Xlight Israel. Xlight specialized in optic switches fabric. I took a big part in the Verilog coding of the transmit FPGA (Virtex2 6000), I also designed the architecture of the multicast option and the VOQ of CSIX and SPI4. The group in which I was included researched tunable lasers control. The Company was closed after a short period.

• ASIC Engineer

  Neomagic Israel

  (Public Company; 51-200 employees; Semiconductors industry)

  May 1999 — January 2001 (1 year 9 months)

  Worked as an ASIC Engineer in . I integrated the MIPS CPU to the embedded system. I also developed the Interrupt Controller and other small blocks, using Verilog. I also built a verification environment using Specman Tools.

Sharon Graif’s Education

• Universitat Ben Gurion Ba-Negev

  communication, computer and VLSI 1993 — 1997