Fei Su

Technical Lead/ Sr. Design-for-Test Engineer/ Sr. Product Development Engineer at Intel Corporation

Greater Detroit Area

Current
  • Technical Lead/Sr. Design-for-Test Engineer/Sr. Product Development Engineer at Intel Corporation
Past
Education
  • Duke University
  • Tsinghua University
Connections
115 connections
Industry
Semiconductors
Websites

Fei Su’s Summary

Technical lead on driving key phases of development of high-speed IO and mixed-signal/analog circuit design-for-test (DFT) and testing techniques for Intel next-generation low-power circuits, including DFT methodology development, architectural design, pre-silicon validation and post-silicon debug

Fei Su’s Specialties:

• Solid background (both industry and academia) in design-for-test (DFT), testing and design automation techniques for mixed-signal and mixed-technology microsystems (CMOS/MEMS/Nanotechnology)

• Experiences in new product development from concept to manufactured product

• Experiences in leading R&D activities across cross-functional teams

• In-depth understanding of implementation and strategies for new project group development in an entrepreneurial environment


Fei Su’s Experience

  • Technical Lead/Sr. Design-for-Test Engineer/Sr. Product Development Engineer

    Intel Corporation

    (Public Company; 10,001 or more employees; Semiconductors industry)

    February 2006Present (3 years 11 months)

     Lead key phases of development of high-speed IO and mixed-signal/analog circuit DFT and testing techniques for Intel next-generation low-power circuits.

     Responsibilities include
    – Design, development and validation of testability circuitry for mixed signal/analog circuits and high-speed digital circuits
    – Evaluation, development and debug of complex test methodologies
    – Development and debug of DFT test patterns and functional patterns for component validation and production test
    – Testing and characterization of mixed-signal/high-speed IO on validation and production testers to guarantee both circuit design spec and high-yield manufacturing.
    – Failure analysis and yield enhancement to ensure high-volume manufacturing of new products

     R&D of system-on-chip (SOC) design and testing methodologies; foster IO DFT standardization

     Identify new frontier in bioMEMS/microsystems and provide R&D consulting service to New Business Initiatives/Formation department.

  • Graduate Research Assistant

    Duke University

    (Educational Institution; 10,001 or more employees; Higher Education industry)

    August 2001January 2006 (4 years 6 months)

    NSF-funded PhD thesis research: developed system-level design and testing automation methodology for composite microsystems (digital microfluidic biochips); investigated key issues about synthesis, testing, and reconfiguration techniques for microsystems

  • DFT CAD Engineer

    Intel Corporation

    (Public Company; 10,001 or more employees; Semiconductors industry)

    May 2005September 2005 (5 months)

    (Internship) Worked on research and development of the CAD support for Design-for-Test (DFT)

  • Analog/Mixed-Signal Circuit Design Engineer

    Triangle Biosystems Inc

    (Privately Held; 11-50 employees; Semiconductors industry)

    June 2003August 2003 (3 months)

    (Internship) Developed full-custom analog and mixed-signal ASICs used for neural research

  • Graduate Research Assistant

    Tsinghua University

    (Educational Institution; 10,001 or more employees; Higher Education industry)

    June 1999June 2001 (2 years 1 month)

    Master research projects in design and testing of microsystem and MEMS


Fei Su’s Education

  • Duke University

    Ph.D. , Electrical and Computer Engineering , 20012006

    Fei Su is the winner of Outstanding Dissertation Award in 2006 for the category "New Directions in Physical Design, Design for Manufacturing and CAD for Analog Circuits" presented by European Design Automation Association (EDAA)

    He has published over 30 papers about design and testing of microsystems (biochip/MEMS) in journals and referred conference proceedings. He is also co-author of a CRC Press book "Digital Microfluidic Biochips: Synthesis, Testing and Reconfiguration Techniques", which presents new methodologies to apply IC CAD and DFT techniques to emerging composite devices (bioMEMS).

    He serves as invited reviewer for IEEE Transactions on CAD, IEEE Design & Test of Computers, ACM Journal on Emerging Technologies in Computing Systems, IEEE/ACM Design Automation Conference, IEEE VLSI Test Symposium and others.

  • Tsinghua University

    M.S. & B.E. , Automation , 19952001

    Participated in research projects of MEMS and microsystems since 1999.

    Master Thesis "Research on the MEMS-based Magnetic Tracking System used in Micro Surgical Tools" won Best Master Thesis Award.


Additional Information

Fei Su’s Websites:

Fei Su’s Interests:

research, history, movie, jogging, entrepreneurship

Fei Su’s Groups:

ITC'07, SVCEF, IEEE Test Technology Technical Council (TTTC) , ACM/SIGDA (Special Interest Group on Design Automation)

  •    LA2M - Lunch Ann Arbor Marketing
  •    Analog Mixed-Signal and RF (AMS/RF) IC Design and Development Group
  •    Semiconductor Professional's Group
  •    Intel Alumni Association
  •    Venture Capital
  •    Startup Specialists
  •    MEMS Professionals Network
  •    Medical Devices Group
  •    DukeGEN - The Duke Global Entrepreneurship Network - Main Group
  •    Tsinghua University Alumni Group
  •    Tsinghua University Overseas Alumni
  •    Duke University Alumni Network
  •    Microelectromechanical Systems (MEMS) Networking
  •    Lab on a chip and Microfluidic Devices (a.k.a., Microfluidics)

Fei Su’s Honors:

• Outstanding Young Author Award, presented by IEEE Circuits and Systems Society, 2008

• Best Paper Award, presented by IEEE International Conference on VLSI Design, 2007

• Marquis Who’s Who in America, 2007

• Intel Corporation Department Recognition Award, 2007, 2008

• Outstanding Dissertation Award, presented by European Design Automation Association (EDAA), for the category “New Directions in Physical Design, Design for Manufacturing and CAD for Analog Circuits”, 2006

• Intel Corporation SRA Recognition Award, 2006

• ACM SIGDA Outstanding Dissertation Award nomination, 2006

• ACM/SIGDA travel grant award, for the SIGDA Ph.D. Forum at IEEE/ACM Design Automation Conference, 2005

• IEEE travel grant award for IEEE International Conference on CAD, IEEE Computer Society, Design and Technical Committee, 2004

• Best master thesis award, Tsinghua University, 2001


Fei Su’s Contact Settings

Interested In:

  • career opportunities
  • consulting offers
  • new ventures
  • job inquiries
  • expertise requests
  • business deals
  • reference requests
  • getting back in touch

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