President - ATSPID, Inc./ ETEST, Inc.
San Francisco Bay Area
President - ATSPID, Inc./ ETEST, Inc.
San Francisco Bay Area
High Speed System Design/Signal Integrity/ATE System Architecture/Semiconductor Test
IC test system architecture and design, IC test applications, High Speed Design, IC Product/Process
(Semiconductors industry)
January 2007 — Present (2 years 7 months)
Automatic Test Equipment Design, Product & Test Engineering Service
(Semiconductors industry)
August 2006 — Present (3 years)
IC Test Hardware Design and Manufacturing
(Public Company; 1001-5000 employees; cmos; Semiconductors industry)
March 2004 — August 2006 (2 years 6 months)
(Public Company; 1001-5000 employees; VTSS; Semiconductors industry)
November 2001 — February 2004 (2 years 4 months)
(Public Company; 1001-5000 employees; CY; Semiconductors industry)
June 2000 — November 2001 (1 year 6 months)
(Privately Held; 201-500 employees; Semiconductors industry)
August 1997 — June 2000 (2 years 11 months)
(Public Company; 1001-5000 employees; XLNX; Semiconductors industry)
May 1994 — August 1997 (3 years 4 months)
(Public Company; 1001-5000 employees; TER; Semiconductors industry)
August 1990 — November 1993 (3 years 4 months)
Formely Megatest
(Public Company; 1001-5000 employees; LTXX; Semiconductors industry)
March 1983 — August 1990 (7 years 6 months)
BS , Business
BS , Electrical Engineering
MBA , Business/Marketing
HS ,
MS , Computer Sciences
Patent Awarded - Patent 5,931,962 – Method and Apparatus for Improving Timing Accuracy of a Semiconductor Test System – Xilinx 1996