Chief I/O and Client Platform Architect at Intel
Portland, Oregon Area
- Current
-
- Chief Client Platform Architect/Intel Fellow at Intel Corporation
- Chief I/O Architect/Intel Fellow at Intel Corporation
- Chief Architect PCI Express Development at Intel
- Past
-
- Intel Fellow at Intel Corporation
- Sr. Principal Engineer at Intel
- Chief Architect USB Development at Intel
- Sr. Staff Architect at Intel
- Principal Engineer at Wang Laboratories
- Education
-
- City University of New York City College
- Maharaja Sayajirao University
- Connections
-
132
connections
- Industry
- Computer Hardware
- Websites
Ajay Bhatt’s Summary
Ajay Bhatt is an Intel Fellow and Chief Client Platform Architect in a Mobile Platforms Group. Ajay leads definition and development of the next-generation Client Platform architecture. He is primarily focused on the novel advances in platform hardware and software by working with key internal and external technology partners to develop the future Client Platform Architectures and Technologies. As a lead Client Platform Architect, Ajay also works with key business and planning groups to be at the forefront of the future Client Platform innovation areas by setting Intel-wide and industry-impacting strategies.
In addition, Ajay continues to hold a position of Intel's Chief I/O architect. In his role as a Chief I/O architect, he is responsible for the platform and I/O interconnects directions for Intel; leading the definition of next-generation platform architectures and I/O technologies across the market segments internally and within the industry.
Ajay is an industry-recognized expert in the area of I/O technologies. At Intel, Bhatt has been instrumental in driving definition and development of broadly adopted technologies such as USB, Accelerated Graphics Port, PCI Express, Platform Power management architecture and various chipset enhancements. Bhatt joined Intel in 1990 as a senior staff architect on the chipset architecture team in Folsom.
Ajay received his master’s degree from The City University of New York. He holds nine U.S. patents with several in various stages of filing. In 1998, 2003 and 2004 Bhatt was nominated to take part in a Distinguished Lecture Series at leading universities in the United States and Asia. He received an Achievement in Excellence Award for his contribution in PCI Express specification development in 2002.
Ajay Bhatt’s Specialties:
Client & Server Platform Architecture, PC Architecture, I/O Architecture
Ajay Bhatt’s Experience
-
Chief Client Platform Architect/Intel Fellow
Intel Corporation
(Public Company; INTC; Semiconductors industry)
June 2008 — Present (1 year 7 months)
Mobile Platform Group
-
Chief I/O Architect/Intel Fellow
Intel Corporation
(Public Company; INTC; Semiconductors industry)
October 2005 — Present (4 years 3 months)
Digital Enterprise Group
-
Chief Architect PCI Express Development
Intel
(Public Company; INTC; Semiconductors industry)
January 2001 — Present (9 years )
As the PCI Express lead architect, Ajay was instrumental in developing and driving the Rev 1.1, 2.0 & 3.0 specifications through the SIG. He continues to be the primary technical lead and spokesperson for PCI Express within Intel and in the industry speaking frequently at press events, IDF and PCI-SIG workshops across the globe.
-
Intel Fellow
Intel Corporation
(Public Company; 10,001 or more employees; INTC; Semiconductors industry)
1990 — 2009 (19 years )
-
Sr. Principal Engineer
Intel
(Public Company; INTC; Semiconductors industry)
July 1996 — November 2001 (5 years 5 months)
Director and lead Architect for Architecture and Performance Analysis team involved in definition and development of the Pentium 4 based chipset and platforms.
-
Chief Architect USB Development
Intel
(Public Company; INTC; Semiconductors industry)
July 1992 — November 1996 (4 years 5 months)
Visionary and Chief Architect for USB 1.1 Development at Intel and with Industry group.
-
Sr. Staff Architect
Intel
(Public Company; INTC; Semiconductors industry)
October 1990 — June 1992 (1 year 9 months)
Lead development of the 80486 and Pentium Chipset definition and deveopment
-
Principal Engineer
Wang Laboratories
(Computer Hardware industry)
1984 — 1990 (6 years )
Ajay Bhatt’s Education
-
City University of New York City College
1981 — 1984
-
Maharaja Sayajirao University
BEEE , Electronics , 1975 — 1980
Additional Information
Ajay Bhatt’s Websites:
Ajay Bhatt’s Interests:
Photography, Travel
Ajay Bhatt’s Groups:
-
M.S. University of Baroda Alumni -
USB 2.0 - USB 3.0 SuperSpeed -
SuperSpeed USB
Ajay Bhatt’s Honors:
Co Inventor of USB. Cheif Architects for AGP4X and PCI Express Technologies
Ajay Bhatt’s Contact Settings
Interested In:
- career opportunities
- consulting offers
- new ventures
- job inquiries
- expertise requests
- business deals
- reference requests
- getting back in touch
