Digital Systems Group Leader and Senior Member of Technical Staff at Draper Laboratory
Greater Boston Area
Digital Systems Group Leader and Senior Member of Technical Staff at Draper Laboratory
Greater Boston Area
Adam J. Elbirt received his B.S. degree in electrical engineering from Tufts University in 1991, his M.Eng. degree in electrical engineering from Cornell University in 1993, and his Ph.D. degree in electrical engineering at Worcester Polytechnic Institute in 2002. Doctor Elbirt is currently a Digital Design Engineer (Senior Member of Technical Staff) in the Hardware Design and Development Directorate at the Charles Stark Draper Laboratory, Inc. His research interests include computer architecture, digital system design, real-time and embedded systems, reconfigurable computing, and information security. Prior to joining Draper Laboratories, Doctor Elbirt spent six years as an Assistant Professor at the University of Massachusetts Lowell. He was the Director of the Information Security Laboratory and the Associate Director of the Center for Network and Information Security. Prior to his appointment at the University of Massachusetts Lowell, Doctor Elbirt spent nearly ten years in industry working as a hardware and software developer, embedded systems designer, programmable logic specialist, and field applications engineer.
Computer architecture, digital system design, real-time and embedded systems, reconfigurable computing, and information security.
(Non-Profit; Defense & Space industry)
June 2008 — Present (1 year 6 months)
• Group Leader for the Digital Systems (GBC7) Group of eleven engineers with a wide range of experience. Responsibilities include conveying the vision of the Electronics Division (GBC), motivating and inspiring group members, coaching and mentoring the development of individual contributors, intervening when necessary to aid the group in resolving issues by facilitating problem solving and collaboration, and encouraging creativity, intelligent risk-taking, and constant improvement. Additional tasks include providing digital systems staffing support to programs in need of the group’s expertise and triaging projects in need of immediate assistance.
• Hardware Development Task Lead for the Trident II Missile System Reentry Avionics Computer (RAC) and Single Board Avionics Computer (SBAC) subsystems for the Life Extension Test Bed 2 (LETB-2) and Conventional Prompt Global Strike (CPGS) Flight Experiment 2 (FE-2), Reentry Materials Experiment 3 (RME-3), and Technology Initiatives programs. Responsibilities include continued development and demonstration of FBM weapon system reentry body materials and technology, scheduling and budgeting of all hardware development tasks and assigned personnel, creation and presentation of proposals to government sponsors, management of engineers assigned to the project team, and oversight of FPGA and board level design, implementation, and test.
• Provide hardware analysis and support to the CPGS Global Positioning System (GPS) task leaders.
• Provide cryptographic algorithm and implementation analysis to the BATMAV Dynamic Data Link (DDL) development team.
• Mentor junior-level hardware engineers. Responsibilities included providing technical assistance and feedback as well as career counseling.
(Educational Institution; Higher Education industry)
July 2002 — June 2008 (6 years )
• Founder and Director of the Information Security (InfoSec) Laboratory. Responsibilities included coordination of undergraduate and graduate student research, identification of interdepartmental collaborative research opportunities, and establishment of industry partnerships to develop state-of-the-art security solutions.
• Founder and Associate Director of Center for Network and Information Security (CNIS). Responsibilities included coordination of undergraduate and graduate student research, identification of interdepartmental collaborative research opportunities, and establishment of industry partnerships to develop state-of-the-art security solutions.
• Founder and Co-chair of the Special Topics in Electrical and Computer Engineering Colloquium. Responsibilities included identification of potential speakers from industry and academia, coordination and advertisement of Colloquium events, and evaluation of speakers based on student feedback to improve the Colloquium format and topic list.
• Member of the Network & Systems Security (NSS) Laboratory within the Computer Science Department.
• Electrical and Computer Engineering Department Transfer Coordinator. Responsibilities included evaluation of transfer applicants, recruitment of transfer students, and assessment of incoming student transcripts to determine appropriate transfer credits.
• Develop and teach the classes listed below. Responsibilities included classroom instruction, supervision of laboratory experiments, and preparation of course materials.
- 16.317 – Microprocessor Systems Design I
- 16.480 – Microprocessors II and Embedded Systems (undergraduate)
- 16.552 – Microprocessors II and Embedded Systems (graduate)
- 16.652 – Parallel and Multiprocessor Architectures
- 16.658 – Computer Network Security
- 16.668 – Advanced Cryptography
- 91.305 – Computer Architecture
- 91.580 – Topics in Computer Science: Advanced Embedded Systems
(Privately Held; Computer & Network Security industry)
February 2001 — July 2002 (1 year 6 months)
• Develop, implement, test, and market hardware intellectual property (IP) cores for use in hardware implementations of the NTRU cryptosystem, specifically targeting the FPGA and ASIC markets.
• Develop, implement, test, and market custom hardware designed to accelerate the performance of implementations of the NTRU cryptosystem.
• Mentor junior-level hardware engineers. Responsibilities included providing technical assistance and feedback as well as career counseling.
(Educational Institution; Higher Education industry)
November 1998 — May 2002 (3 years 7 months)
• Teach the classes listed below. Responsibilities included classroom instruction, supervision of laboratory experiments, and preparation of course materials for use in the ABET certification process.
- EE2799 – Electrical and Computer Design
- EE3801 – Advanced Logic Design
- EE4801 – Advanced Computer System Design
- CS3043 – Social Implications of Computing
• Referee for the third annual Workshop on Cryptographic Hardware and Embedded Systems (CHES). Responsibilities included review of abstracts and papers submitted for conference publication.
• Organizer and referee for the second annual Workshop on Cryptographic Hardware and Embedded Systems (CHES). Responsibilities included management of conference registration and events as well as review of abstracts and papers submitted for conference publication
• Referee for the first annual Workshop on Cryptographic Hardware and Embedded Systems (CHES). Responsibilities included review of abstracts and papers submitted for conference publication.
• Teaching Assistant for EE3815 – Digital System Design with VHDL. Responsibilities included one week of class instructing, supervising of laboratory experiments, management of Viewlogic and Xilinx software installation and maintenance, and grading of quizzes, labs, and exams.
• Teaching Assistant for EE3801 – Introduction to Logic Circuits. Responsibilities included supervising of laboratory experiments, assisting in the design of new laboratory experiments, and grading of quizzes, labs, and exams.
(Computer Software industry)
June 1996 — October 1998 (2 years 5 months)
• Develop, implement, and market the Mentor to Viewlogic database conversion flows and tools. Technical tasks included development of the flows and tools for converting libraries and schematics, development and testing of the tools to convert LMS databases to Viewlogic PKT and Access database format, and integration of the Mentor to Viewlogic conversion tools into Library Studio. Marketing tasks included development of pricing information, marketing collateral, and demonstration materials for the translation process and presentation of those materials to customers.
• Technical expert on Mentor to Viewlogic database conversion, assisting the direct, distributor, and VAR sales channels in making systems sales into existing Mentor accounts. Tasks included demonstrating Viewlogic conversion tools and providing technical support and integration to customers.
• Technical expert on programmable logic, assisting the direct, distributor, and VAR sales channels in making systems sales. Tasks included demonstrating and benchmarking Viewlogic tools against competitors, providing technical support and integration to customers, developing demonstrations of the Viewlogic FPGA tools for use within the systems environment.
• Design, implement, and test the design flows for VHDL, Verilog, schematic, and mixed design methodologies for Actel and Lucent FPGAs into the IntelliFlow tool as part of the Workview Office 7.3, 7.31, and 7.4 releases. Tasks included development and test of scripts used to automate the design flows, generation and maintenance of complete vendor part libraries, integration of vendor macros, testing of the IntelliFlow tool on multiple OS platforms, coordinating the on-line help and error tracking systems for vendor flows, and integration of the IntelliFlow tool into the Workview Office tool suite.
(Public Company; MKSI; Semiconductors industry)
July 1994 — June 1996 (2 years )
• Coordinate the scheduling of all software department personnel.
• Design, upgrade, debug, and test the Intel 8051 based embedded C code for the Electronic Control Unit (ECU) of the Partial Pressure Transducer (PPT) system using Archimedes C. Design, upgrade, debug, and test PC based C code for the PPT Host software using Borland C. Troubleshoot and repair ECUs and provide support to production personnel. Provide customer support for all PPT software.
• Project lead for LabVIEW products. Tasks included project management of a five-member team as well as coordination of the design, development, and manufacturing processes that resulted in the release of the PPTView for Windows software and demo diskette. Software responsibilities: design, implement, and integrate the embedded C code required to implement the full upgrade of the PPT I/O module.
• Project lead for Brookhaven National Laboratories contract. Tasks included project management of an eight-member team as well as coordination of the design, development, and manufacturing processes. Software responsibilities: design, implement, and integrate with hardware the embedded C code required to implement an RS485 communications interface, a one-deep data storage buffer, partial pressure to ion current data conversion, and the creation of new command tokens allowing for dual filament control through the ECU.
• Design, debug, test, and integrate with hardware the embedded C code required for the PPT I/O daughter board. Tasks included Host to ECU software interface modification and command token creation, design of CPU to PPT I/O board software interface to both analog and digital I/O, state machine design and modification for emission and electron multiplier control, and design of internal status and trip point calculations.
(Computer Hardware industry)
July 1993 — July 1994 (1 year 1 month)
• Design, simulate, and test the Bumpy Bar Code to PC Interface Module and corresponding PC interface software utilizing PC bus interface logic, PLD design using ABEL, and software design using Borland C.
• Upgrade, simulate, and test the Electronic Counter-Counter Measure Pattern Recognition and Reporting Module and the Video Playback Module for the REOC PARCs radar interface using Actel FPGAs.
• Upgrade, simulate, and test the Seek Igloo Radar Test Set Module utilizing PC bus interface logic and PAL design using ABEL.
• Upgrade, simulate, and test the VME Azimuth Change Pulse Module and the Universal Input/Output Module utilizing VMEbus interface logic and PAL design using ABEL.
• Design and simulate component models for use in the Workview Pro environment.
(Public Company; RTN; Defense & Space industry)
June 1991 — September 1992 (1 year 4 months)
• Design, simulate, and test the Sparrow Low Noise Amplifier Digital Controller Module using Altera EPLDs, the MaxPlus II Schematic Capture, AHDL, and Simulation Systems and the Mentor CADD System.
• Test and debug hardware for the Advanced Sparrow Auto-Pilot Digital Subsystem.
• Design, simulate, and test multiple test setups and equipment for the AEGIS-ER missile system and the Japan HAWK missile system.
• Review and update test patterns for the Sparrow missile system.
• Create and update documentation and drawings on Mentor CADD System for program modules.
• Develop software for module testing and implementation.
PhD , Electrical Engineering, Computer Science (Minor), Management (Minor) , 1998 — 2002
Minors in Computer Science and Management.
Dissertation titled “Reconfigurable Computing for Symmetric-Key Algorithms”, 2002.
MEng , Electrical Engineering , 1992 — 1993
Master's Project titled "Three-Dimensional Object Matching Via Two-and-a-Half Dimensional Data", 1993.
BSEE , Electrical Engineering , 1987 — 1991
Degree completed with Computer Engineering option.
Research interests include applying technology to sports, implementing information security in resource constrained systems, power and energy analysis of embedded processors using LabVIEW for data acquisition/analysis, and developing reconfigurable architectures for security applications. Personal interests include fishing and baseball.
IEEE Senior Member
ACM
Eta Kappa Nu
Sigma Chi
Award of Excellence for Outstanding Professor of the Year, 2004, Eta Kappa Nu, Epsilon Zeta chapter.
Nominated for the Teacher Who Exceeds Expectations Award, May 2004, Student Government Association, University of Massachusetts Lowell.
Oustanding Performer Award, 1997, Viewlogic Systems, Inc.