Yuri Panchul

Current

• Staff Engineer at MIPS Technologies

Past

• Staff Software Engineer at Denali Software, Inc
• Principal Engineer at Synopsys
• Founder and Chief Technology Officer at C Level Design, Inc

• Senior Software Engineer at Mentor Graphics
• Senior Software Engineer at Microtec Research, Inc.
• Senior Software Engineer at Creative Labs
• Software Engineer at Cognitive Technology Corporation

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4 more...

Education

• Foothill College
• Moskovskij Fiziko-Tehniceskij Institut (Gosudarstvennyj Universitet)
• Kiev Natural Science Lyceum

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Connections

38 connections

Industry

Computer Software

Websites

• My Website

Yuri Panchul’s Summary

I am a senior software engineer and architect with extensive expertise in Electronic Design Automation (EDA), authoring compilers, tools for embedded system design and applications for pattern recognition. I am a hands-on career code writer and offer superior implementations for complicated problems in short time frames.

I worked in several large companies - Synopsys, Mentor Graphics, Creative Labs, and was a founder of a venture-funded EDA startup C Level Design. The products I created are being used by several leading semiconductor and system companies. US Citizen.

Yuri Panchul’s Specialties:

C/C++ up to ANSI standard version 3.1 – expert
C++ after ANSI standard version 3.1 – intermediate
Tcl/Tk application integration – working knowledge
Verilog RTL level – advanced
Verilog Behavioral level – working knowledge
System Verilog, VHDL – working knowledge
Vera – went through training
RTL synthesis with Synopsys Design Compiler, Cadence Ambit, Exemplar Leonardo, Synplicity Synplify – working knowledge
Interra and Verific Verilog and VHDL frontends

Yuri Panchul’s Experience

• Staff Engineer

  MIPS Technologies

  (Public Company; MIPS; Semiconductors industry)

  October 2009 — Present (2 months)

• Staff Software Engineer

  Denali Software, Inc

  (Privately Held; Semiconductors industry)

  November 2003 — June 2009 (5 years 8 months)

  I architected and implemented six products, included verification model for ASI (a switched fabric bus that uses the PCI Express interface); verification models on-chip protocols AHB, AXI and OCP; experimental RDL (Register Definition Language) verification methodology and a model of GDDR5 (a graphics card memory). I also worked on several Flash verification products. These products were used by leading semiconductor and system companies and helped them to tapeout a number of designs.

• Principal Engineer

  Synopsys

  (Public Company; SNPS; Computer Software industry)

  November 2001 — November 2003 (2 years 1 month)

  I came to Synopsys as a part of C Level Design intellectual property acquisition in 2001. I architectured and implemented two sub-products – CycleC-to-Verilog and Verilog-to-CycleC translators. During 2002-2003 CycleC Translator was a part of a Synopsys's flagship product - VCS Verilog simulator.

• Founder and Chief Technology Officer

  C Level Design, Inc

  (Computer Software industry)

  November 1996 — November 2001 (5 years 1 month)

  I founded C Level Design in 1996 and architectured the company’s flagship product – System Compiler, a C-toVerilog translator, which generated $3.5M revenue during 2000-2001. The product got good press, was used by a number of leading semiconductor companies and was eventually acquired by Synopsys, Inc.

• Senior Software Engineer

  Mentor Graphics

  (Public Company; MENT; Computer Software industry)

  October 1995 — October 1996 (1 year 1 month)

  I came to Mentor Graphics as a part of Microtec Research acquisition. I integrated Microtec Research embedded software development tools with Mentor Graphics Seamless CoVerification Environment for system-level design. I managed a team of contractors developing Instruction Set Simulators (ISSs) and Bus Interface Models (BIMs) for Hitachi SH and Intel x86 families. I also created a Bus Interface Model (BIM) for PowerPC processors.

• Senior Software Engineer

  Microtec Research, Inc.

  (Computer Software industry)

  July 1995 — October 1995 (4 months)

  Developed embedded cross-debugger XRAY and instruction set simulators for Motorola 68K family and Intel 960 processors. Microtec Research was acquired by Mentor Graphics in October, 1995.

• Senior Software Engineer

  Creative Labs

  (Public Company; CREAF; Computer Hardware industry)

  January 1994 — July 1995 (1 year 7 months)

  Developed a compiler for attributed BNF grammar used to describe natural language for continuous speech recognition. Developed a scripting language interpreter for the user-programmable command and control portion of continuous speech recognition application.

• Software Engineer

  Cognitive Technology Corporation

  (Computer Software industry)

  August 1991 — January 1994 (2 years 6 months)

  Developed an Optical Character Recognition engine for OEMs and a retail OCR product. This engine became a part of Corel Draw – a popular Windows desktop publishing product.

Yuri Panchul’s Education

• Foothill College

  Biology 2003 — 2008

  I attended part-time classes and got a degree in Biology at Foothill mostly for fun, because I became interested in biology and organic chemistry and decided to go through the main college sequence on these subjects. Later on I used this knowledge to write articles on popular science for several magazines, including a major Russian weekly The New Times ("Novoye Vremya").

• Moskovskij Fiziko-Tehniceskij Institut (Gosudarstvennyj Universitet)

  BS , Computer Science, Applied Mathematics , 1987 — 1991

  This is one of the top five universities in the former Soviet Union

• Kiev Natural Science Lyceum

  Mathematics , Physics , 1984 — 1987

  This is one of the best-known Ukrainian schools for advanced children specializing in Mathematics and Physics. While I was studying there, I won several competitions in Mathematics.

Additional Information

Yuri Panchul’s Websites:

• My Website

Yuri Panchul’s Interests:

I have a hobby in popular science writing and I wrote about 30 magazine articles on various topics, including space exploration, the history of computing, biotechnology and evolution.

Yuri Panchul’s Groups:

IEEE, Accelerra C/C++ working group

•    Microtec alumni

Yuri Panchul’s Honors:

United States Patent No. 6,226,776 B1. Panchul at al. System for Converting Hardware Designs in High-level Programming Language to Hardware Implementations

Electronic Engineering Times. By Richard Goering. Startup offers alternative to behavioral synthesis at DesignCon. Issue 990. January 26, 1998. http://www.eetimes.com/news/98/991news/startup.html

An article about C Level and System Compiler on http://www.deepchip.com/items/dac01-08.html

Donald Soderman and Yuri Panchul. Implementing C Designs in Hardware: ANSI C to RTL Verilog Design & Test-Bench Compiler. In Proceedings. 1998 International Verilog HDL Conference and VHDL International Users Forum, Santa Clara, CA, March 1998. IEEE Computer Society Press.

Donald Soderman and Yuri Panchul. Implementing C algorithms in reconfigurable hardware using C2Verilog. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, Los Alamitos, CA, April 1998. IEEE Computer Society Press.

Yuri Panchul’s Contact Settings

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