Director of Systems Engineering at DisplayLink (UK) Ltd
Twickenham, United Kingdom
Director of Systems Engineering at DisplayLink (UK) Ltd
Twickenham, United Kingdom
• Multidisciplinary “Expert team” management
• Embedded Systems Expert
• Facilitator for requirements analysis, planning and problem solving
• Future Trends / Disruptions Analysis
• Technical lead in strategic customer discussions
• Specialist in RISC CPU core applications
• Hardware/Software co-design advocate
• Systems on Chip Architecture recommendations and definition
• System Platform creation
• Active in UK Universities and Government Knowledge Transfer Networks
Chartered Engineer CEng
BSc (Eng)
MIEEE
MIET
Managing Innovation teams, SoC architectures, embedded software and hardware including real-time Operating Systems, Embedded Linux, RISC CPUs (MIPS,ARM) ,Technical trend analysis, University networking, Research Liaison
(Privately Held; Semiconductors industry)
April 2009 — Present (9 months)
(Privately Held; Semiconductors industry)
2002 — 2009 (7 years )
(Privately Held; Semiconductors industry)
September 2006 — December 2008 (2 years 4 months)
(Public Company; PHG; Consumer Electronics industry)
2003 — December 2008 (5 years )
(Semiconductors industry)
2003 — December 2008 (5 years )
(Public Company; 10,001 or more employees; Semiconductors industry)
August 1981 — October 2006 (25 years 3 months)
Philip Semiconductors were bought by PE in Oct 2006 and became NXP Semiconductors
5 Patents while at Philips Semiconductors + others pending:
Method and apparatus for data reproduction EP1346361/WO2002052560
Method and apparatus for data reproduction EP1346360/WO2002052559
Method for updating firmware of a computer peripheral device US6253281
Method for updating program code for an optical disc drive EP0932868/WO9859296
Method and System of Copy protection of information EP1088450/WO0064157
(Public Company; PHG; Consumer Electronics industry)
December 1990 — September 2003 (12 years 10 months)
1999-2003 Section Manager , Philips Semiconductors Systems Labs Southamton (UK)- Managing an advanced multidisciplinary R&D team of 18 Engineers (all BSc/MSc/PhD) defining new architectural and verifying concepts for Storage Systems, Included liaising with the Philips Research activity and monitoring/guiding the future programmes
Team/Group Leader 1990-1999
Specifying and evaluating ICs for Digital Audio systems, responsible for planning and presenting training courses to FAEs and customers
Leading a team (8 engineers) defining new system architectures for Optical Data Storage (CD/DVD) ICs, managed a Test IC development to verify new architecture concepts, this included managing multi site sub-contractors. This architecture was adopted by the mainstream business as the core of their new generation“Nexperia” ™ Engine ICs
(Public Company; 10,001 or more employees; PHG; Semiconductors industry)
March 1986 — November 1990 (4 years 9 months)
Philips Semiconductors – Applications Labs Mitcham UK
Responsible (2 man team) for writing from scratch the software stack for the first integrated CMOS Chipset for Analogue Cellular Radio (AMPS/TACS)
1986 -1990 Senior Engineer , Leading a small team (4 engineers) Specifying and evaluating new ICs for Cellular Mobile Phones. Running training courses for Field Applications Engineers (FAEs) worldwide and supporting the strategic sales marketeers with customer visits and presentation of conference papers
(Semiconductors industry)
1981 — 1990 (9 years )
(Public Company; 10,001 or more employees; Semiconductors industry)
September 1981 — February 1985 (3 years 6 months)
Assisting in the design and test of microprocessor (Intel 8048/8051)
based communication and display modules – (Teletext, Viewdata)
Designed a Gate Array for Line21 (US Closed captioning text)
1978 — 1981
Group Scout Leader of 8th Twickenham Scouts Rowing- Whalers, Gigs, and Cutters (Traditional Rowing) on the Thames
Member IEEE since 1996
Papers/Presentations
1989 Co-Author and presented Paper on “An Integrated Chipset for Cellular Mobile Telephones” at RF Expo West, Santa Clara, CA
1990 Co-Author Paper for IEEE ICCE “Low Cost Approach To Cellular Mobile Telephones”
1993 Co-Author Paper for IEEE ICCE “A New Chip-set Implementing The Digital Compact Cassette System”
1996 Co-Author Paper/Presented for IEEE ICCE “System Design Considerations For A One-Chip Digital Compact Cassette (DCC) Signal Processor” in Chicago
Member of IET since 1981
Chartered Electrical Engineer - CEng