Tim Robson

CTO Office: Semiconductor management at ST-Ericsson

Lyon Area, France

Current
Past
Connections
367 connections
Industry
Semiconductors

Tim Robson’s Summary

16 years experience in the semiconductor industry with varied roles in process nodes from 500 to 32nm. Significant experience and knowledge in low power methodologies, technology and low power design along with overall design flow and SoC implementation. Good management experience with both direct line and functional reporting across sites, groups and technical expertise.

Tim Robson’s Specialties:

Chip implementation, low power, enthusiasm and drive


Tim Robson’s Experience

  • CTO Office: Semiconductor management

    ST-Ericsson

    (Public Company; Telecommunications industry)

    October 2009Present (3 months)

    Member of CTO Office with overall responsability for semiconductor technology at ST-Ericsson

  • Physical Design Department Manager & 28nm Driver

    ST-Ericsson

    (Public Company; Telecommunications industry)

    August 2008September 2009 (1 year 2 months)

    ST-Ericsson Joint Venture representative to the IBM/ISDA 32/28nm process alliance.

    Responsible for rolling out the ISDA 32/28nm process technology to the ST-Ericsson joint venture. Working with IBM/ISDA Alliance partners and ST Microelectronics to put together the best in class 32/28nm process and design implementation technologies.

    Also design manager for ST-Ericsson responsible for implementation teams over 4 sites working on multiple projects.

    Responsible for:-
    STA
    Synthesis
    Floorplanning
    Physical Implementation
    CTS
    Timing Closure
    Manufacturing checks
    Final GDSII
    Package Co-design

  • Team Lead

    Texas Instruments

    (Public Company; 10,001 or more employees; TXN; Semiconductors industry)

    January 2004August 2008 (4 years 8 months)

    Team lead of physical design/timing closure/sta team working on TI's 45nm products.

    Responsible for:-
    STA
    Synthesis
    Floorplanning
    Physical Implementation
    CTS
    Timing Closure
    Manufacturing checks
    Final GDSII

  • Various

    Various

    (Semiconductors industry)

    19932004 (11 years )

    Various roles in physical design from stdcell and IO design to full chip RTL2GDSII creation and closure. EDA and methodology along with pre sales and customer facing roles and applications engineering.


Tim Robson’s Contact Settings

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