
IC Digital Physical Design AE at Cadence
Greater Boston Area

IC Digital Physical Design AE at Cadence
Greater Boston Area
Expert user of Cadence's SoC-Encounter Digital Integrated Circuit implementation platform (which competes with Synopsys IC Compiler, Magma BlastFusion, Mentor/Sierra Pinnacle, and Atoptech Aprisa). Focused on high value pre-sales technical campaigns as a customer-facing Applications Engineer. Interested in opportunities which allow me to leverage this technical experience along with business skills learned on the job and through formal education.
-Programming in common Electronic Design Automation scripting languages such as TCL and Cadence SKILL
-Planning and executing technical campaigns that result in successful customer adoption
-Communicating solution value clearly to customers and collaborating effectively with colleagues