Paolo De Nicola

Paolo De Nicola

Project Manager PMP, Chip Architect

Nice Area, France

Past
  • Senior Staff Engineer at Infineon
  • Senior Design Engineer at Conexant
  • Senior Design Engineer at SSD (then Parthus Ceva)

1 more...

Education
  • University of Pavia
Recommended
Paolo has 4 recommendations 4 people have recommended Paolo
Connections
265 connections
Industry
Semiconductors

Paolo De Nicola’s Summary

System-on-chip definition and architecture for wireless and telecommunication application.
Project management.

Paolo De Nicola’s Contact Settings

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