Graduate Student at The University of Texas at Dallas
Dallas/Fort Worth Area
Graduate Student at The University of Texas at Dallas
Dallas/Fort Worth Area
My research and work has been centered around FPGA Architecture Design & CAD and ASIC Physical Design Tools. My primary focus has been on FPGA Architectural Estimators & Design along with PnR for FPGAs. I am interested in fundamental algorithms for PnR for FPGAs as well as ASICs.
(Educational Institution; 51-200 employees; Higher Education industry)
August 2007 — Present (2 years 4 months)
(Public Company; 51-200 employees; QUIK; Semiconductors industry)
July 2006 — August 2007 (1 year 2 months)
(Public Company; 1001-5000 employees; Computer Software industry)
September 2005 — May 2006 (9 months)
(Public Company; 10,001 or more employees; Semiconductors industry)
June 2001 — August 2005 (4 years 3 months)
BTech , Electronics & Communication , 1997 — 2001
Trekking, paper modeling
Patents at ST Microelectronics on FPGA Architecture.