Nick Francis

Current

• ASIC Manager at DisplayLink

Past

• Principal Engineer at DisplayLink
• Principal ASIC Engineer at Conexant
• Principal ASIC Engineer at GlobespanVirata

• Senior ASIC Engineer at Virata
• ASIC Engineer at ATML
• Technologist at GEC Marconi Sensors

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Education

• University of Bath

Connections

147 connections

Industry

Semiconductors

Nick Francis’s Summary

ASIC Manager with strong design, integration and project management background. Experience of the full ASIC/CoT flow including the following:
- Design methodology
- ASIC management
- 3rd party IP selection and integration
- Design (Verilog/VHDL)
- Verification (VCS/Modelsim/NCSim)
- Emulation (FPGA/Quickturn)
- Synthesis (Synopsys/Synplicity/Magma/Xilinx)
- Formal Equivalence (LEC/Formality)
- DFT Scan and BIST (Synopsys/Mentor)
- Layout (Magma)
- Timing Closure (Primetime/Magma)
- Silicon debug (including FIB fixes)

Nick Francis’s Specialties:

Particular experience in ASIC team management, chip planning and estimation, IP integration and 'middle end' of flow through to timing closure.

Nick Francis’s Experience

• ASIC Manager

  DisplayLink

  (Privately Held; Semiconductors industry)

  August 2009 — Present (5 months)

  Primarily involved in ASIC team management, ASIC design methodology, IP selection, interfacing to partners, long term planning, team development, budgeting, project management, as well as maintaining hands-on design and integration skills.

• Principal Engineer

  DisplayLink

  (Privately Held; Semiconductors industry)

  October 2005 — August 2009 (3 years 11 months)

  Technical/Project Lead for Network to Video ASICs.

• Principal ASIC Engineer

  Conexant

  (Public Company; CNXT; Semiconductors industry)

  November 2003 — July 2005 (1 year 9 months)

  Project lead for ADSL network ASICs

• Principal ASIC Engineer

  GlobespanVirata

  (Public Company; GSPN; Semiconductors industry)

  October 2001 — November 2003 (2 years 2 months)

  Project lead for ADSL network ASICs, including top level integration, DFT, Clock/Reset control, timing closure and backend support.

• Senior ASIC Engineer

  Virata

  (Public Company; VRTA; Semiconductors industry)

  February 1998 — October 2001 (3 years 9 months)

  ASIC Design Engineer for Network/ADSL ASICs, including block design/verifcation, top level integration, DFT.

• ASIC Engineer

  ATML

  (Semiconductors industry)

  June 1995 — February 1998 (2 years 9 months)

  ASIC Design Engineer, particularly involved with system emulation using Quickturn System Realiser.

• Technologist

  GEC Marconi Sensors

  (Defense & Space industry)

  September 1991 — June 1995 (3 years 10 months)

  Engineer working on many parts of large thermal imaging systems.

Nick Francis’s Education

• University of Bath

  2.1 BSc/MEng , Electrical and Electronic Engineering , 1991 — 1995

  Activities and Societies:

  American Football, Real Ale society