
Social network builder in Austin, Texas; Hardware verification engineer, software consultant.
Austin, Texas Area

Social network builder in Austin, Texas; Hardware verification engineer, software consultant.
Austin, Texas Area
Founder of door64.com and High-Tech Austin LinkedIn Group. The goal is to help Central Texas tech folks to be more well-connected to each other. Our site enables online networking via discussion forums, finding and posting local tech job opportunities, and discovering all the networking, tech, and professional development events happening each week. We also hold face-to-face happy hour events periodically.
I am a Functional Verification engineer for both microprocessors and SoC's, with specialty in test bench construction and verification methodology. I have interests in system architecture and modeling (ESL), performance assessment, and processor architecture. I do software consulting on the side, primarily in Java.
See my complete resume and publications on my website.
Verilog
SystemVerilog Assertions (SVA)
Vera
C / C++, STL
SystemC
Perl
Virtual CPU (V-CPU)
HSpice
Cadence Virtuoso
Java (software development, GUI applications)
Eclipse RCP
DesignSync
CVS
ClearCase
(Information Services industry)
August 2007 — Present (1 year)
door64.com is a social network exclusively for Central Texas high-technology professionals. It exists to help us network both online and in person, discover relevant events happening in our area, publicize our expertise, and find local tech employment opportunities.
Most job transitions are made through leads obtained via your peer network. The time to build a professional network is before you need one to rely upon. door64 is here to help you build that network, and make you successful in Central Texas.
(Privately Held; 10,001 or more employees; Semiconductors industry)
March 2002 — Present (6 years 5 months)
* Highly experienced in verification of SoC's, microprocessors (PowerPC), PCI, COP / memory BIST, and much much more.
* Verification IP & testbench development using Vera, C++, Verilog, and SystemVerilog (assertions).
* Well versed in directed tests and directed-random testcase generation, as well as testbench construction and verification methodology. Was an IEEE Computer Society guest speaker on the topic.
* Wrote a simulator from scratch entirely in C++ for implementing and analyzing a bus arbitration algorithm I developed. I did this in my own time, for fun. Yes, I realize that I need better hobbies.
* I'm relatively well traveled (and in fact, I enjoy it from time to time). I have been to India, China, and Malaysia for project-related activities.
(Public Company; 10,001 or more employees; MOT; Semiconductors industry)
January 1998 — March 2002 (4 years 3 months)
* I was responsible for all aspects of performance enhancement, reliability, feasibility, and manufacture of a communications processor chip family: MPC860
* Very experienced in probe, final test characterization and debugging, design of fab and assembly experiments to enhance yield and quality, new hardware evaluation and troubleshooting, test program modification and debug, and process and assembly qualifications. In other words, I did all kinds of stuff. I also trained all the new guys.
* Authored many formal engineering reports and data sheets used by customers, as well as tutorials for evaluation of engineering experiments. Yes, you read right: I'm an engineer who can write.
(Public Company; 10,001 or more employees; NT; Telecommunications industry)
June 1997 — August 1997 (3 months)
(Public Company; 10,001 or more employees; NT; Telecommunications industry)
December 1996 — March 1997 (4 months)
(Public Company; 5001-10,000 employees; EK; Computer Hardware industry)
November 1995 — May 1996 (7 months)
M.S., Electrical Engineering, 2004 — 2005
Enrolled in the Electronic Circuit Design MSEE program at UT-Austin while working full-time at Freescale. Graduated with 4.0/4.0 GPA.
B.S., Computer Engineering, September 1992 — December 1997
Professional: System modeling and ESL, EDA tools, processor architecture, data visualization. Personal: Volleyball, biking, guitar.
* IEEE
* Advisory Board, Rochester Institute of Technology (Computer Engineering), door64.com, Volleyball
* Guest speaker, IEEE Computer Society: "Functional Verification Methodology at Freescale Semiconductor" (December 2006; Rochester, NY).