Mark S Harris

Current

Florilegium Coordinator at Florilegium.org website

Past

Electrical Engineer (consultant) at Zebra Imaging
Senior Product Development Engineer at Dell
Senior Electronics Engineer at Celestica

Senior Electronics Engineer at Motorola/Freescale Semiconductor
Electronics Engineer at Motorola

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2 more...

Education

The University of Texas at Austin

Connections

131 connections

Industry

Computer Hardware

Websites

Mark S Harris’s Summary

Hands-on Electrical/Hardware Engineer with extensive experience in System Architecture Design, Circuit Design, Logic Design, Microprocessor Interfacing. Ability to do both hardware and software. Strong ability to work individually or as part of a team from project conception through verification, including interfacing with Electrical, Mechanical, Test and Manufacturing teams. Excellent ability to visualize solutions and solve technical issues.

Mark S Harris’s Specialties:

Product Design Proficiency:

System Architecture, Product Definition and Specification. Digital Circuit Design. PLD & FPGA design, Power distribution. Mentor and Cadence Schematic Capture and Layout tools.

Application Software Proficiency:

Abel, Palasm and VHDL hardware languages. Python, C, Pascal, FORTRAN and various assembly languages. Microsoft Office and Visio, Adobe FrameMaker. Experience with various operating systems including Windows, Mac and Unix.

Mark S Harris’s Experience

Florilegium Coordinator

Florilegium.org website

(Non-Profit; Myself Only; Information Services industry)

1994 — Present (15 years)

Creator and maintainer of a large information website (>2100 files) making available a wide-ranging amount of information across many fields of interest to those studying the Middle Ages (Fall of Rome to 1600 C.E.) and information about the SCA, Society for Creative Anachonism, the world's largest medieval re-creation group. The site consistently has 100,000 unique visiters each month with 10-15 Gbytes of information downloaded each month.
Electrical Engineer (consultant)

Zebra Imaging

(Privately Held; 11-50 employees; Computer Hardware industry)

September 2007 — December 2007 (4 months)

* Architected power distribution system for 12 KW modular 80 processor graphics system.
* Designed the cooling, Ethernet and power systems for the initial 5-processor module for the above system.
Senior Product Development Engineer

Dell

(Public Company; 10,001 or more employees; DELL; Computer Hardware industry)

January 2007 — June 2007 (6 months)

* Designed board-level hardware for new server.
Senior Electronics Engineer

Celestica

(Public Company; 5001-10,000 employees; Electrical/Electronic Manufacturing industry)

July 2005 — May 2006 (11 months)

* Assigned directly to IBM Corporation as a member of the server design team.
* Designed 3+ Gigahertz Power6 processor board for mid-level eClipz series servers.
* Debugged various in-house developed engineering tools.
Senior Electronics Engineer

Motorola/Freescale Semiconductor

(Public Company; 10,001 or more employees; Computer Hardware industry)

June 1991 — December 2004 (13 years 7 months)

* Produced numerous processor cards for a variety of PowerPC processors, allowing these chips to be quickly tested, debugged and brought to market in less time and money than using production chip testers.
* Created a series of Gigabit Ethernet Boards to test processor RMII, MII, GMII, TBI, RGMII, RTBI interfaces both with and without commercial PHY chips.
* Designed complex four-processor 128-bit data bus processor card.
* Produced processor card with high-speed L2 cache memory for Apple and Apple-clone computers which brought in $140 million profit.
* Designed highly configurable PCI backplane board used for testing new PCI controller chips.
Electronics Engineer

Motorola

(Public Company; Computer Hardware industry)

June 1982 — June 1991 (9 years 1 month)

* Created In-house test and development VME board for the 68030 processor and the VME and VSB gate array chips. This card became the core of all future Motorola 68030 and 68040 VMEbus products.
* Chief architect of the Motorola VME Master/Slave gate array chip. This became the VME interface used on all Motorola VMEbus processor boards for several years.
* Pioneered first Motorola VMEbus memory board using SIP memory modules, the first using a mezzanine board and the first using ZIP memory packaging.
* Designed the industry's first 32-bit VMEbus dynamic memory board, increasing sales of the companion 32-bit processor board.

Mark S Harris’s Education

The University of Texas at Austin

BS , Electrical Engineering , 1975 — 1982

Activities and Societies:

Alpha Phi Omega, IEEE, IEEE Computer Society

Additional Information

Mark S Harris’s Websites:

Mark S Harris’s Groups:

Active participant in the SCA, Society for Creative Anachronism, an international group that studies and holds events re-creating the Euorpean Middle Ages. I have created and run a large website for this group and those with similar interests, http://www.florilegium.org, St. Mathews Job Search Group