Sr. Member of Technical Staff, Sun Microsystems, Inc.
San Francisco Bay Area
- Current
-
- Sr. Member of Technical Staff at Sun Microsystems
- Past
-
- Intern at IBM-India Research Lab, New Delhi
- Design Engineer at Thomson Consumer Electronics
- Education
-
- Michigan State University
- State University of New York at Buffalo
- University of Calicut
- Connections
-
31
connections
- Industry
- Computer Hardware
- Websites
Krish Sundaresan’s Summary
Technologist with proven track record of developing several innovations in low-power VLSI CAD tools and methodologies. Expertise and deep academic experience in low-power design techniques.
Experience & Projects
__________________
08/2008 to present, Sr. Member of Technical Staff, Processor Design Tools, Sun Microsystems, Inc.
--> Conceptualized and architected an internal automatic fine-grained clock-gating tool for high performance microprocessor design (05/2008-current).
12/2006 to 07/2008, Member of Technical Staff, Processor CAD, Sun Microsystems, Inc.
--> Developed a macro-model to estimate clock and wire power in RTL designs and created an RTL power estimation solution used at Sun (03/2008 - 09/2008).
--> Championed several improvements in the transistor-level power estimation flow used at Sun and deployed to several processor projects at Sun. (10/2007 - 06/2008).
--> Co-developed a power optimization flow using longer-channel length device (GBIAS) swapping to balance leakage savings and active power in microprocessor designs. (02/2007 - 09/2007).
06/2005 to 08/2005, Summer Intern, IBM India Research Lab, High Performance Computing Group.
04/1999 to 07/2000, Design Engineer - Embedded Systems, Thomson Consumer Electronics, India.
Patents Filed
_________________
* Automatic clock gating insertion and propagation technique, Application filed at USPTO June 2009.
* Technique using power macromodeling for RTL power estimation, Application 12/436,019 filed at USPTO May 2009.
* Leakage power optimization considering gate input activity and timing slack, Application 12/011,310 filed at USPTO Jan., 2008.
Krish Sundaresan’s Specialties:
Expertise in designing methodologies and developing solutions for VLSI power estimation & optimization at architectural, RTL, gate- and transistor levels, design and implementation of automatic clock gating methods and tools; Expertise in power-performance design exploration, microarchitecture simulation, and RTL synthesis; Knowledge of static timing, noise, & signal integrity analysis techniques for high-performance design.
Krish Sundaresan’s Contact Settings
Interested In:
- career opportunities
- job inquiries
- reference requests
- getting back in touch
