Principle ASIC Development Design Engineer
San Francisco Bay Area
- Current
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- Principle ASIC Development Design Engineer and Read Channel Architect at LSI Logic
- Education
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- Texas A&M University
- Jawaharlal Nehru Technological University
- Connections
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263
connections
- Industry
- Semiconductors
- Websites
Kiran Gunnam’s Summary
Extensive research and development work experience in real time implementation of communication and signal processing systems on VLSI and programmable platforms (ASIC/FPGA/DSP).
Worked in several corporate R&D groups full time while pursuing PhD. PhD research contributed several key innovations in advanced error correction systems based on LDPC. In addition my research and development work resulted in low complexity designs for several communication and signal processing applications such as signal processing design for a novel high precision navigation sensor called Visnav that is used for unmanned aerial refueling. For both hardware and software: expertise in optimizing for speed, power, area and overall performance for each one or all at the same time.
Elected as IEEE Senior Member in April 2007 for significant contributions in integrated circuit design for signal processing and communication systems.Have 50 US patent applications and/or invention disclosures.
Current work is focused on 1) algorithm development for LDPC based error correction systems and 2) their ASIC hardware architecture and micro-architecture, implementation in magnetic read channel systems along with the FPGA prototyping for hard disk read channels.
Kiran Gunnam’s Specialties:
System level and algorithm development, VLSI architectures and work load partitioning, Strong mathematical skill set, Strong theoretical and practical background in Signal processing, Communication systems and in VLSI systems, low complexity design and analysis of advanced algorithms, computer architecture, computer arithmetic, queuing systems, Fixed- point analysis, RTL development of application specific VLSI Systems and FPGA based systems, Firmware (assembly and C) development for DSPs.
Additional Information
Kiran Gunnam’s Websites:
Kiran Gunnam’s Interests:
Travel, Reading, Chess, Tennis
Kiran Gunnam’s Groups:
Friends,
IEEE
*2010 Chair for IEEE Santa Clara Valley (SCV)
Solid State Circuits Society
*2009 Vice Chair for IEEE Santa Clara Valley (SCV)
Solid State Circuits Society
*Technical Program Committe Member for IEEE conferences ICC,Globecom,IMTC,SSIAI.
*Reviewer for several IEEE Journals and conferences.
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Telecom Professionals -
The Official IEEE Group -
Semiconductor Professionals -
Intel Alumni Association -
Aggie Networking -
Embedded -
VLSI Design -
Santa Clara Valley IEEE -
Schlumberger -
ASIC & FPGA Engineers: www.ASICForum.com -
FPGA - Field Programmable Gate Array -
FPGA/CPLD Design Group -
The Indus Entrepreneur -
JNTU Kakinada Alumni -
JNTU College of Engineering, Kakinada -
IEEE Consultants' Network of Silicon Valley -
LSI Corporation -
VentureOnLine Experts Network -
Indian Professionals in Silicon Valley -
RTL Design & Logic Design Professionals -
Northern California Electronics
Kiran Gunnam’s Honors:
* PhD research contributed several key innovations in advanced error correction systems based on LDPC.
* My R&D work resulted in low complexity signal processing design for a novel high precision vision based navigation sensor called Visnav that is used for unmanned aerial refueling.
* Worked in several corporate R&D groups full time while pursuing PhD. Have 50 US patent applications and/or invention disclosures.
* Elected as IEEE Senior Member in April 2007 for significant contributions in integrated circuit design for signal processing and communication systems. Fewer than 0.1% of 384,400 were elected as IEEE Senior Member under or at the age of 30.
* I-140 for Outstanding Researcher (EB-1) through both Marvell and LSI. Green Card granted.
* Several Top Texas A&M University and Corporate Scholarships ($60,000) in addition to tuition waivers.
* Certificate of Recognition, Intel
* Ranked 29 in Engineering Common Entrance Test
* National Merit Scholarship, India.
Kiran Gunnam’s Contact Settings
Interested In:
- career opportunities
- consulting offers
- new ventures
- job inquiries
- expertise requests
- business deals
- reference requests
- getting back in touch
