
San Francisco Bay Area

San Francisco Bay Area
10 more...
Electronic engineer with a software bias. Experience in analog design (specifically: power electronics), then EDA tools, specializing in parallel processing simulation. Used to working with others peoples' large C/C++/Verilog projects.
Contributed to the development of the Verilog-AMS and SystemVerilog standards. Claim to fame: inventor of connect-module methodology in Verilog-AMS.
Extremely good at reducing problems to fundamentals, and finding alternative approaches.
Currently working on an ESL project: extending C++ for parallel processing and hardware description - from "the cloud" to transistors. If you are interested in joining in, link up!
EDA Tool Development, parallel processing and mixed-signal simulation, verification methodology.
Software architecture. C, C++, perl.
Small company system administration (Windows/Linux/Solaris).
Photography, Skiing, Snowboarding
IEEE, Accellera