Kiran Bulusu

Current

Sr.Field Application Engineer at Magma Design Automation

Past

Lead Application Engineer at Atrenta
Sr.software Engineer at Atrenta
Design verification Engineer at Kasura Technologies

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Education

Portland State University
University of Madras

Recommended

5 people have recommended Kiran

Connections

188 connections

Industry

Semiconductors

Websites

Kiran Bulusu’s Summary

Proven ability to define and develop new products/solutions, acheieve technical wins in pre-sales engagements, manage major accounts (Global Accts)
Strong Technical Experience in working on ASIC Front End Solutions. and High Performance Cores ( 1 GHz+)

Kiran Bulusu’s Specialties:

Specialties:
Product Management
New Products definition and introduction
Pre-Sales
Customer Relationship Management

Technical :
Logic/Physical Synthesis,Formal Verification,
DFT, Timing Closure
Hierarchical Floorplanning
Front End Prototyping

Kiran Bulusu’s Experience

Sr.Field Application Engineer

Magma Design Automation

(Public Company; 501-1000 employees; LAVA; Semiconductors industry)

November 2005 — Present (3 years 2 months)

Managing Global account, Pre-Sales for ASIC Front End which includes Design Planning & Prototyping ,Formal Verification, Logic Synthesis, DFT, Timing Analysis (Timing Closure), Hierarchical Floorplanning.
Lead Application Engineer

Atrenta

(Privately Held; 51-200 employees; Computer Hardware industry)

June 2004 — November 2005 (1 year 6 months)

Post-Sales for Entire Sprectrum of SpyGlass product suite ( DFT, Clock-Reset, Constraints) ; Product Deployment ; Product Packaging; Product Validation; Mentoring Fresh Grads; Product Licensing.
Sr.software Engineer

Atrenta

(Privately Held; 51-200 employees; Computer Hardware industry)

June 2003 — May 2004 (1 year)

Post-Sales for Entire Sprectrum of SpyGlass product suite ( DFT, Clock-Reset, Constraints) ; Product Validation; Product Licensing.
Design verification Engineer

Kasura Technologies

(Privately Held; 11-50 employees; Semiconductors industry)

June 2002 — June 2003 (1 year 1 month)

Systel Level Verification using systemC ; Developing Verification IP's;

Kiran Bulusu’s Education

Portland State University

MS, IC Design, Computer Architecture, August 2000 — June 2002
University of Madras

B.E, Electronics and Communications Engg, 1996 — 2000

Additional Information

Kiran Bulusu’s Websites:

Kiran Bulusu’s Interests:

Enterprenuership, Pre-Sales, Marketing, New Evolving Technology in Formal Verification, Logic Synthesis, DFT, Timing Analysis (Timing Closure) and Power Analysis and optimization.