
Graduate Research Assistant, E-Textiles Lab, Virginia Tech
Roanoke, Virginia Area

Graduate Research Assistant, E-Textiles Lab, Virginia Tech
Roanoke, Virginia Area
Possess 3 years of embedded system development experience.Currently pursuing Masters in Computer Engineering focusing on computer systems(architecture design for distributed embedded applications).
Research/Career Interests: Embedded Software/Systems Development, FPGA/ASIC Design
Embedded Systems development and testing with exposure to almost all the phases of product development, Exposure to Object-Oriented Design,Scripting experience (Python and Perl), FPGA and ASIC implementations (System Verilog, Synopsys Tools), Computer Architecture (Dataflow) ,Automobile engine systems.
(Higher Education industry)
December 2008 — Present (1 year 3 months)
Design and development of a dataflow pipelined processor architecture using System Verilog with Synopsys tool-chain and an architecture exploration framework for the same using Python, C and C++ on Linux.
(Educational Institution; 5001-10,000 employees; Higher Education industry)
August 2008 — December 2008 (5 months)
Independent lab supervisor for Electronic Networks course.
(Public Company; 10,001 or more employees; DPHIQ; Automotive industry)
July 2005 — July 2008 (3 years 1 month)
--> Application layer development and feature level testing of embedded software for Engine Management Systems (EMS)
--> Development of PERL based automation tools
--> Project coordinator managing a team of Software engineers, handling work allocation, and improving the productivity and quality metrics of the team
--> Been the point of contact for Teamwork tool management, training and server maintenance.
--> Key member in the training team giving hands-on training to new entrants of the team.
Master of Science , Computer Engineering , 2008 — 2010 (expected)
Thesis: Design of a novel embedded architecture for E-Textiles applications
Courses: Parallel Computer Architecture, Configurable Computing, Wearable & Ubiquitous Computing,
Analysis/Design of Embedded Systems, Digital Design II, Testing and Verification of Digital Systems
2001 — 2005
Participated in various design contests, hardware and software contests and won prizes.
IEEE
--Rated “Outstanding” in the annual performance appraisal at Delphi for the year 2007-2008.
--Received the coveted Quality Performance Award and a cash reward at Delphi citing “flawless execution of RSA project development” and “excellent training” provided to the new entrants.
--Received the Quality Performance Award once more for proactively developing many PERL based tools that automated most of the routine jobs eliminating manual errors and substantially decreasing the time required.
--Qualified for the final round of National Talent Search Examinations conducted by the National Council of educational Research and Training-an apex educational body of the Government of India.