Consulting HW Eng., - Embedded Computer Systems
Greater Boston Area
- Education
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- University of Maryland College Park
- Recommended
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- Computer Hardware
J.J. Barrow’s Summary
I'm a hardware design engineer having 18 years experience researching and developing embedded processor systems used for data communications and high-availability computing. My roles supporting product development and release include: hardware architecture, FPGA and CPLD logic design, PCB design, hardware test and validation, performance analysis, and documentation.
At the moment I'm reading some great books by Mike Mintz and Robert Ekendahl on hardware verification. Even better they've released the 'truss' and 'teal' verification libraries and code base as open-source, so I'm trying it out now on my Ubuntu Linux server.
Additional Information
J.J. Barrow’s Groups:
IEEE Computer Society, IEEE Communications Society
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EMC Alumni Network -
ASIC & FPGA Engineers: www.ASICForum.com -
Stratalums
J.J. Barrow’s Contact Settings
Interested In:
- reference requests
- getting back in touch
