Jackey Wong

Current

• MBET Candidate at University of Waterloo

Past

• M.Eng Candidate at University of Toronto
• ASIC Design/Layout Engineer 2 at AMD
• IC Design Engineer at Pixelworks

• Associated Engineering - Multimedia Software & Hardware at ATI
• Jr. Engineering at VisualSonics
• Programmer Analyst at Alliance Atlantis

see less...

3 more...

Education

• University of Waterloo
• University of Toronto
• University of Waterloo

see less...

Connections

145 connections

Industry

Higher Education

Jackey Wong’s Experience

• MBET Candidate

  University of Waterloo

  (Educational Institution; 1001-5000 employees; Higher Education industry)

  August 2008 — Present (1 year)

• M.Eng Candidate

  University of Toronto

  (Educational Institution; 10,001 or more employees; Higher Education industry)

  September 2006 — August 2008 (2 years)

  Thesis topic: "Automated Debugging Framework for Efficient Design Debugging"
  
  Received 4.0 GPA

• ASIC Design/Layout Engineer 2

  AMD

  (Public Company; 10,001 or more employees; AMD; Semiconductors industry)

  January 2007 — January 2008 (1 year 1 month)

  Took chairman role in verification regression status meeting to ensure all outstanding issues were addressed and resolved
  
  Proactively involved in architecting the next-generation verification framework with novel constraint-based verification and functional coverage techniques

• IC Design Engineer

  Pixelworks

  (Public Company; 201-500 employees; PXLW; Semiconductors industry)

  August 2004 — January 2007 (2 years 6 months)

  Extensively involved in front-end ASIC design flow from functional specification to final netlist delivery
  
  Proactively involved in architecting the next-generation video processing technology using novel SoC design methodology

• Associated Engineering - Multimedia Software & Hardware

  ATI

  (Public Company; 1001-5000 employees; ATYT; Computer Hardware industry)

  May 2002 — April 2004 (2 years)

  Took ownership of video qualification process for low-cost video/graphics adapters for OEMs
  
  Assisted various video/graphics adapters bring-up process
  
  Developed video accelerating features for top-of-line video/graphics adapters.

• Jr. Engineering

  VisualSonics

  (Privately Held; 51-200 employees; Medical Devices industry)

  September 2001 — December 2001 (4 months)

  Architected and implemented advanced error reporting system, and significantly improved digital image processing algorithm

• Programmer Analyst

  Alliance Atlantis

  (Public Company; 501-1000 employees; Broadcast Media industry)

  May 2000 — April 2001 (1 year)

  Developed a web-based IT system for theatrical management to assist corporation sales and revenue projection

Jackey Wong’s Education

• University of Waterloo

  MBET , Business, Entrepreneurship & Technology , 2008 — 2009

  Area of studies: project management, business operation & development, strategic management, marketing/sales, negotiation, entrepreneurial finance, management/financial accounting, organizational behaviour

  Activities and Societies:

  STEP External Funding Committee, MBET Social Committee, GSA Councillor

• University of Toronto

  M.Eng , Electrical & Computer Engineering , 2006 — 2008

  Thesis topic: "Automated Debugging Framework for Efficient Design Debugging"
  
  Received 4.0 GPA
  
  Area of studies: hi-tech entrepreneurship, financial engineering, SoC design methodology, advanced computer architecture, behavioral synthesis for digital system, CAD for digital circuit synthesis and layout

  Activities and Societies:

  Connections 2008 (E&CE Graduate Symposium)

• University of Waterloo

  B.A.Sc , Electrical & Computer Engineering , 1999 — 2005

  Design symposium: "Project ARTEMIS: An Autonomous Robotic Tracking System"
  
  Area of studies: software engineering, programming, database, networking, computer system architecture, electronic device, communication theory, control system, robotics, integrated circuit

  Activities and Societies:

  Co-op Society (co-found), Engineering Society, Class Representative, Waterloo Aerial Robotic Group, Midnight Sun Solar Car Team, UW ASIC Design Team

Additional Information

Jackey Wong’s Groups:

•    MBET
•    University of Toronto Alumni (4,000+)
•    Waterloo Alumni
•    ASIC & FPGA Engineers: www.ASICForum.com
•    FPGA - Field Programmable Gate Array
•    Waterloo Engineering Alumni
•    University of Waterloo
•    Advanced Micro Devices (AMD) Alumni
•    Centre for Business, Entrepreneurship and Technology
•    Kitchener-Waterloo Entrepreneurs

Jackey Wong’s Honors:

- Awarded RIM MBET Scholarship, 2008
- Nominated for University of Toronto Business Plan Competition, 2008
- Awarded First Place Award for Corporate Design at the Ontario Engineering Competition, 2002
- Awarded Second Place Award for Corporate Design at the Canadian Engineering Competition, 2002