Catherine Ahlschlager

Catherine Ahlschlager

Hardware Manager at Sun Microsystems

San Francisco Bay Area

Current
Past
  • Applications engineering manager at Chrysalis Symbolic Designs
  • Applications engineer at Cadence Design Systems
Education
  • University of Southern California
Connections
85 connections
Industry
Computer Hardware

Catherine Ahlschlager’s Summary

EDA applications engineering
Processor verification
specialize in formal verification - model checking, symbolic simulation,
clock domain checking
My most recent interest is performance validation
People management

Catherine Ahlschlager’s Specialties:

Logic design verification, formal verification.


Catherine Ahlschlager’s Experience

  • Hardware Manager

    Sun Microsystems

    (Public Company; 10,001 or more employees; SUNW; Computer Networking industry)

    Currently holds this position

  • Applications engineering manager

    Chrysalis Symbolic Designs

    (Privately Held; 51-200 employees; Semiconductors industry)

    November 1999March 2000 (5 months)

    Applications engineer

  • Applications engineer

    Cadence Design Systems

    (Public Company; 1001-5000 employees; CDNS; Computer Software industry)

    February 1990June 1994 (4 years 5 months)


Additional Information

Catherine Ahlschlager’s Groups:

  •    The Official USC Alumni Association Group
  •    Sun Microsystems, Inc.
  •    Design Verification Professionals
  •    SEED Engineering Mentoring
  •    RTL Verification Professionals

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