Engineering Manager, Audio DSP Systems Architect and Real-time Embedded Software Developer
San Francisco Bay Area
Engineering Manager, Audio DSP Systems Architect and Real-time Embedded Software Developer
San Francisco Bay Area
- 24 years experience developing embedded DSP and microcontroller software using mix of C, C++, and assembly.
- 11 years experience in audio product development and with audio DSP software development.
- 6 years experience in engineering management and software project/lifecycle management.
- Extensive knowledge of real-time systems design, device driver programming, and RTOS theory.
Software project and lifecycle management. Real-time DSP software development. Audio product development. Audio signal processing. Digital filter design. Fixed-point DSP implementation. Real-time operating systems. Matlab/Simulink modeling. Algorithm design, implementation, and optimization. Language proficiency: C, C++, DSP assembly.
(Public Company; 501-1000 employees; DLB; Consumer Electronics industry)
November 1999 — Present (10 years 2 months)
Senior/lead real-time embedded software engineer with experience in all aspects of DSP systems design and implementation for broadcast and cinema products. Engineering manager with experience in software project, resource, and lifecycle management. Currently managing team of 5 engineers involved in a broad range of projects and products. Extensive experience with digital filter design, FFTs, fixed point conversion, use of MATLAB for modeling/simulation. Experience with C, C++, and assembly programming of Analog Devices SHARC, TigerSHARC, Freescale 563xx, TI C64xx processors. Hands-on experience in device driver design, DSP chip bring-up, audio path debug, real-time exec-layer design. Projects have included technology/IP transfer from research to real-time implementation, and migration of existing Dolby IP into new products and DSP platforms. End-to-end concept-to-delivery ownership of system software design, development, debug, and maintainance.
(Self-Employed; Myself Only; Computer Software industry)
October 1998 — October 1999 (1 year 1 month)
Audiologic, Inc., Boulder, CO (October 1998 - June 1999) :
Responsible for design of all firmware to implement Dolby Digital (AC-3) and ProLogic audio decoding algorithms in real-time, using the Analog Devices 21160 SHARC DSP. Performed extensive DSP algorithm design, MATLAB simulation, and programming of audio DAC/ADC and S/PDIF devices. Verified and demonstrated real-time operation of AC-3 and ProLogic decoders.
(Privately Held; 11-50 employees; Semiconductors industry)
February 1998 — October 1998 (9 months)
Wrote and simulated Dolby AC-3 multichannel audio decoding algorithms on a proprietary low-power DSP core developed by Audiologic. Implemented optimized algorithms in assembly using a highly parallel DSP instruction set. Used Matlab to simulate various stages of the AC-3 decoding process. Implemented various types of real time FFT and DCT algorithms, including the Short Time Fourier Transform. Gained experience in developing firmware architectures for real-time FFT-based signal processing. Authored whitepapers that provided DSP performance estimates and benchmarks for various stages of AC-3 decoding.
(Public Company; 1001-5000 employees; ADPT; Semiconductors industry)
June 1993 — August 1997 (4 years 3 months)
Designed and developed real-time servo head positioning firmware for a custom ASIC servo controller with an embedded DSP core (Pine). Completed redesign of servo algorithm using MATLAB/Simulink to model system behavior. Provided extensive engineering support to several key customers, which included adaptation of servo firmware to many different customer disk drives and hardware platforms. Involved with specification of quadrature/greycode servo burst patterns suitable for proper demodulation by the ASIC servo processor. Provided frequent customer training and design input. Assisted in behavioral simulations of Verilog designed ASICs.
(Public Company; 1001-5000 employees; Computer Hardware industry)
October 1990 — June 1993 (2 years 9 months)
Developed a DSP-based head positioning system for a disk drive servo trackwriter. This design used an Analog Devices ADSP2111 DSP chip to implement closed loop digital control of a laser interferometer-based positioning system. Designed entire digital logic and microcontroller subsystem for this project, based on an Intel 80196 microcontroller and Altera programmable gate arrays. Developed real-time, event-driven C and Assembly code to control the system. Implemented PC-based user interface in TCL / C++ for production mode operation of the trackwriter.
(Public Company; 5001-10,000 employees; Computer Hardware industry)
June 1989 — October 1990 (1 year 5 months)
Developed 68HC11 firmware algorithms for improving seek performance on 40MB/80MB 3.5" fixed disk drive products. Responsible for implementation of state space designed tracking servo for 2.5" product, using an 80196KC microcontroller. Performed modeling, analysis, and performance optimization of state-space designed servo systems, using MATLAB, MathCAD, and C. Gained experience with real-time software development and disk drive digital servo control.
(Educational Institution; 1001-5000 employees; Higher Education industry)
August 1987 — August 1989 (2 years 1 month)
Instructor responsible for coordinating and teaching a microprocessor interfacing lab course. This work included redesign of course curriculum and lab assignments for the academic year. Designed experiments to teach 8086 hardware interfacing and assembly/Pascal programming. Instructed several sections of an introductory logic laboratory. Received outstanding instructor evaluation two consecutive semesters.
(Public Company; 201-500 employees; Defense & Space industry)
June 1988 — June 1989 (1 year 1 month)
Developed assembly and C code for 68000-based UNIX/VME bus system used to monitor FAA air traffic control and flight plan data for U.S. Customs drug interdiction purposes. Assisted in systems installation and testing at several FAA air route traffic control centers. Gained experience with Altera FPGA development environment. Developed a C based monitor program for system debug. Developed C algorithms to perform adaptive filtering on SAR (Synthetic Aperture Radar) image data.
(Government Agency; 51-200 employees; Research industry)
February 1984 — August 1987 (3 years 7 months)
Principal engineer responsible for design of a data logger used to record real-time meteorological measurements for a network of portable weather stations. Developed firmware to sample, log, and compute statistics on each sensor channel. Designed a digital sensor recording system for use in TOTO, a portable tornado observatory. Designed A/D converter subsystem to sample each analog sensor. Engaged in field testing and deployment of TOTO which involved several months of "storm chasing" with a team of research meteorologists.
MSEE , Electrical / Computer Engineering , 1987 — 1990
Emphasis in Digital Signal Processing and Feedback Control Systems.
BS , Engineering Physics , 1983 — 1987
Elective coursework focus in electrical engineeering. Graduated with Distinction. Dean's list for 5 semesters. GPA: 3.6 / 4.0