The RapidIO Interconnect Architecture , designed to be compatible with the most popular integrated communications processors, host processors, and networking digital signal processors, is a high-performance, packet-switched, interconnect technology. It addresses the high-performance embedded industry's need for reliability, increased bandwidth, and faster bus speeds in an intra-system interconnect. The RapidIO interconnect allows chip-to-chip and board-to-board communications at performance levels scaling to ten Gigabits per second and beyond.

The RapidIO Trade Association , a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RapidIO architecture. For networking products, the RapidIO architecture promises increased bandwidth, lower costs, and a faster time-to-market than other more computer-centric bus standards. Interested companies are invited to join the RapidIO Trade Association. Members of the association have access to the RapidIO interconnect architecture specifications. Membership also allows attendance at member meetings.

Industry leading OEM's and suppliers comprise the Steering Committee of the RapidIO Trade Association.

The Steering Committee manages the Trade Association and appoints the Technical and the Marketing Working Groups. The Working Groups coordinate the activities of various Task Groups. The working groups are chartered by the Steering Committee, and chaired by any member composition determined by the Working Group Chairman. Co-chair positions will be used for critical functions.

The RapidIO Interconnect Architecture is a result of a collaborative design effort between Motorola SPS (now Freescale Semiconductor) and longtime customer Mercury Computer Systems, Inc. This breakthrough interconnect architecture is being offered as an open standard through membership to the RapidIO Trade Association. To date, 40 other companies have joined the growing RapidIO community. « less