Group for People Involved In the Design and Verification of FPGA's, and CPLD's to Exchange Idea's and Techniques.(The focus is more on FPGA/CPLD in the product as opposed to FPGA's solely as a way to an ASIC)VHDL / Verilog / ABEL / Xilinx / Altera / Actel / Lattice / Atmel, Mentor, Cadence, Synopsys
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